 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| (R) EL1510 Data Sheet March 26, 2007 FN7122.2 Medium Power Differential Line Driver The EL1510 is a dual operational amplifier designed for central office and customer premise line driving in both SDSL and ADSL solutions. This device features a high drive capability of 250mA while consuming only 7.5mA of supply current per amplifier, operating from 12V supplies. This driver achieves a typical distortion of less than -85dBc, at 150kHz into a 25 load. The EL1510 is available in the power 8 Ld DFN package and is specified for operation over the full -40C to +85C temperature range. The DFN package has the potential for a very low junction to ambient thermal resistance of 43C/W, making it suitable for high power applications. The EL1510 is in the 8 Ld SOIC package and thus is limited to applications where the power dissipation in the device is less than 781mW. The EL1510 is ideal for CPE modem applications in ADSL, HDSL2, G.SHDSL, and VDSL. Features * 40VP-P differential output drive into 100 * -85dBc typical driver output distortion at full output at 150kHz * Low quiescent current of 7.5mA per amplifier * Pb-free plus anneal available (RoHS compliant) Applications * ADSL G.lite CO line driving * G.SHDSL, HDSL2 line drivers * ADSL full rate CPE line driving * Video distribution amplifiers * Video twisted-pair line drivers Ordering Information PART NUMBER EL1510CS EL1510CS-T7 PART TAPE & MARKING REEL 1510CS 1510CS 1510CS 1510CSZ 1510CSZ 7" 13" 7" 13" 7" 13" PACKAGE 8 Ld SOIC 8 Ld SOIC 8 Ld SOIC 8 Ld SOIC (Pb-Free) 8 Ld SOIC (Pb-Free) 8 Ld SOIC (Pb-Free) 8 Ld DFN 8 Ld DFN 8 Ld DFN PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0047 MDP0047 MDP0047 Pinouts EL1510 (8 LD SOIC) TOP VIEW OUTA 1 INA- 2 INA+ 3 GND 4 + 5 INB+ + 6 INB8 VS 7 OUTB EL1510CS-T13 EL1510CSZ (See Note) EL1510CSZ-T7 (See Note) EL1510CSZ-T13 1510CSZ (See Note) EL1510 (8 LD DFN) TOP VIEW EL1510CL EL1510CL-T7 EL1510CL-T13 OUTA INAINA+ GND 1 2 3 4 8 7 6 5 VS OUTB INBINB+ 1510CL 1510CL 1510CL + Amp A Amp B + NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002, 2004, 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. EL1510 Absolute Maximum Ratings (TA = +25C) VS+ Voltage to Ground . . . . . . . . . . . . . . . . . . . . . . -0.3V to +26.4V VIN+ Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS+ Current into any Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 75mA Ambient Operating Temperature Range . . . . . . . . . .-40C to +85C Storage Temperature Range . . . . . . . . . . . . . . . . . .-60C to +150C Operating Junction Temperature . . . . . . . . . . . . . . .-40C to +150C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER AC PERFORMANCE BW HD dG d SR -3dB Bandwidth VS = 12V, RF = 1.5k, RL = 100 to mid supply, TA = 25C unless otherwise specified. CONDITIONS MIN TYP MAX UNIT DESCRIPTION AV = +4 f = 1MHz, VO = 16VP-P, RL = 50 AV = +2, RL = 37.5 AV = +2, RL = 37.5 VOUT from -4.5V to +4.5V 350 70 -75 0.17 0.1 500 MHz dBc % V/s Total Harmonic Distortion Differential Gain Differential Phase Slewrate DC PERFORMANCE VOS VOS ROL Offset Voltage VOS Mismatch Transimpedance VOUT from -4.5V to +4.5V -17 -10 1 2 17 10 3.5 mV mV M INPUT CHARACTERISTICS IB+ IBIBeN iN+ iNNon-Inverting Input Bias Current Inverting Input Bias Current IB- Mismatch Input Noise Voltage +Input Noise Current -Input Noise Current -5 -30 -20 2.8 1.8 19 5 30 20 A A A nV/ Hz pA/ Hz pA/ Hz OUTPUT CHARACTERISTICS VOUT VOUT P VOUT N IOUT SUPPLY VS IS Supply Voltage Supply Current per Amplifier Single Supply All Outputs at 0V 5 7.5 24 9 V mA Loaded Output Swing Single Ended Loaded Output Swing Single Ended Loaded Output Swing Single Ended Output Current RL = 100 to GND RL = 25 to GND RL = 25 to GND RL = 0 10.3 9.5 -8.2 10.9 10.2 -9.8 500 V V V mA 2 FN7122.2 March 26, 2007 EL1510 Typical Performance Curves 28 VS=12V AV=10 RL=100 RF=1.5k GAIN (dB) BW (MHz) 20 RF=1k 55 53 51 49 47 45 43 41 39 37 8 100K 35 1M 10M 100M 5 6 7 8 9 10 11 12 FREQUENCY (Hz) VS (V) 8 Ld SO 8 Ld DFN AV=5 RF=1.5k RL=100 24 16 RF=2k 12 FIGURE 1. DIFFERENTIAL FREQUENCY RESPONSE vs RF 22 VS=12V AV=5 RL=100 RF=1.5k GAIN (dB) 14 RF=1k FIGURE 2. DIFFERENTIAL BANDWIDTH vs SUPPLY VOLTAGE 16 14 12 10 IS (mA) 8 6 4 18 10 RF=2k 6 2 2 100K 0 1M 10M 100M 0 1 2 3 4 5 6 7 8 9 10 11 12 13 FREQUENCY (Hz) VS (V) FIGURE 3. DIFFERENTIAL FREQUENCY RESPONSE vs RF 22 VS=12V AV=5 RL=100 RF=1.5k CL=22pF FIGURE 4. SUPPLY CURRENT vs SUPPLY VOLTAGE -45 -50 -55 VS=6V AV=5 RF=1.5k RL=100 f=1MHz 18 CL=10pF GAIN (dB) THD (dB) 14 -60 -65 -70 -75 -80 -85 10 VS=6V VS=12V CL=0pF 6 2 100K -90 1M 10M 100M 1 5 9 13 17 21 25 29 33 37 41 45 FREQUENCY (Hz) VOP-P (V) FIGURE 5. DIFFERENTIAL FREQUENCY RESPONSE vs CL FIGURE 6. DIFFERENTIAL TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE - ALL PACKAGES 3 FN7122.2 March 26, 2007 EL1510 Typical Performance Curves -50 -55 -60 -65 HD (dB) -70 -75 -80 -85 -90 1 3 5 7 9 11 13 15 17 19 VOP-P (V) HD2 HD3 VS=6V AV=5 RF=1.5k RL=100 f=1MHz THD (dB) (Continued) -40 -50 -60 -70 100kHz -80 -90 -100 0 5 10 15 20 25 VOUT PTP (V) 200kHz VS=12V RLOAD=200 (DIFF) AV=10 & 15 50kHz FIGURE 7. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE - ALL PACKAGES -50 -55 -60 HD (dB) -65 -70 -75 -80 -85 -90 1 5 9 13 17 21 25 29 33 37 41 45 VOP-P (V) -80 HD2 -90 0 VS=12V AV=5 RF=1.5k RL=100 f=1MHz HD3 THD (dB) -30 -40 -50 -60 FIGURE 8. DISTORTION RESULTS VS=6V RLOAD=200 (DIFF) AV=10 & 15 100kHz -70 200kHz 50kHz 1 2 3 4 5 6 7 8 9 10 VOUT PTP (V) FIGURE 9. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE - ALL PACKAGES -50 OUTPUT IMPEDANCE () -55 -60 THD (dB) -65 -70 -75 -80 -85 1 5 9 13 17 21 25 29 33 37 41 45 VOP-P (V) 0.001 10K VS=6V VS=12V AV=5 RF=1.5k RL=100 f=1MHz 100 FIGURE 10. DISTORTION RESULTS 10 VS=12V AV=1 RF=1.5k 1 0.1 0.01 100K 1M FREQUENCY (Hz) 10M 100M FIGURE 11. DIFFERENTIAL TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE - ALL PACKAGES FIGURE 12. OUTPUT IMPEDANCE vs FREQUENCY 4 FN7122.2 March 26, 2007 EL1510 Typical Performance Curves -10 CHANNEL SEPARATION (dB) VOLTAGE NOISE (nV/Hz), CURRENT NOISE (pA/Hz) (Continued) 100 -30 IB- -50 10 -70 BA -90 AB EN IB+ -110 10K 1 100K 1M FREQUENCY (Hz) 10M 100M 10 100 1K 10K 100K 1M 10M FREQUENCY (Hz) FIGURE 13. CHANNEL SEPARATION vs FREQUENCY 20 FIGURE 14. VOLTAGE AND CURRENT NOISE vs FREQUENCY 0.18 0.16 DIFFERENTIAL GAIN (%) 0 PSRR (dB) 0.14 0.12 0.1 0.08 0.06 0.04 0.02 VS=12V VS=6V -20 -40 PSRR-60 PSRR+ -80 10K 02 100K 1M FREQUENCY (Hz) 10M 100M 0 1 2 3 4 5 NUMBER of 150 LOADS FIGURE 15. PSRR vs FREQUENCY 10M 40 0 1M MAGNITUDE () PHASE 100K -40 -80 -120 -160 GAIN -200 -240 -280 100 1K 10K 100K 1M 10M -320 100M 0 0 PHASE () DIFFERENTIAL PHASE () 0.1 0.08 0.06 0.04 0.02 0.12 FIGURE 16. DIFFERENTIAL GAIN VS=6V VS=12V 10K 1K 1 2 3 4 5 FREQUENCY (Hz) NUMBER of 150 LOADS FIGURE 17. TRANSIMPEDANCE (ROL) vs FREQUENCY FIGURE 18. DIFFERENTIAL PHASE 5 FN7122.2 March 26, 2007 EL1510 Typical Performance Curves 16 15.5 SLEW RATE (V/s) -25 0 25 50 75 100 125 150 15 14.5 14 13.5 13 -50 (Continued) 490 470 450 430 410 390 370 350 -50 SUPPLY CURRENT (mA) -25 0 25 50 75 100 125 150 DIE TEMPERATURE (C) DIE TEMPERATURE (C) FIGURE 19. SUPPLY CURRENT vs TEMPERATURE 18 16 INPUT BIAS CURRENT (A) 14 FIGURE 20. SLEW RATE vs TEMPERATURE 11.1 VS=12V RL=200 11 12 10 8 6 4 10.8 2 0 -2 -50 -25 0 25 50 75 100 125 150 10.7 -50 0 50 100 150 IB+ IBVOUT 10.9 DIE TEMPERATURE (C) DIE TEMPERATURE (C) FIGURE 21. INPUT BIAS CURRENT vs TEMPERATURE 10 8 6 4 2 0 -2 -50 VOUT FIGURE 22. OUTPUT VOLTAGE vs TEMPERATURE -10.6 VS=12V RL=200 OFFSET VOLTAGE (mV) -10.8 -11 -25 0 25 50 75 100 125 150 -11.2 -50 0 50 100 150 DIE TEMPERATURE (C) DIE TEMPERATURE (C) FIGURE 23. OFFSET VOLTAGE vs TEMPERATURE FIGURE 24. OUTPUT VOLTAGE vs TEMPERATURE 6 FN7122.2 March 26, 2007 EL1510 Typical Performance Curves 3.5 1.8 3 TRANSIMPEDANCE (M) POWER DISSIPATION (W) 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 0 0 DIE TEMPERATURE (C) AMBIENT TEMPERATURE (C) 25 50 75 85 100 125 150 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 1.136W J SO 8 10 C /W (Continued) JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD A =1 FIGURE 25. TRANSIMPEDANCE vs TEMPERATURE FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 4.5 4 POWER DISSIPATION (W) 3.5 3 2.5 2 1.5 1 0.5 0 JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD - DFN EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5 1.2 1 POWER DISSIPATION (W) 781mW 0.8 0.6 0.4 0.2 0 J SO A =1 2.907W DF N8 J A =4 3 C /W 8& 60 DF N8 C /W 0 25 50 75 85 100 125 150 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) AMBIENT TEMPERATURE (C) FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 28. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Applications Information Product Description The EL1510 is a dual operational amplifier designed for line driving in DMT ADSL solutions. It is a dual current mode feedback amplifier with low distortion while drawing moderately low supply current. It is built using Elantec's proprietary complimentary bipolar process and is offered in industry standard pin-outs. Due to the current feedback architecture, the EL1510 closed-loop 3dB bandwidth is dependent on the value of the feedback resistor. First the desired bandwidth is selected by choosing the feedback resistor, RF, and then the gain is set by picking the gain resistor, RG. The curves at the beginning of the Typical Performance Curves section show the effect of varying both RF and RG. The 3dB bandwidth is somewhat dependent on the power supply voltage. Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended. Lead lengths should be as short as possible, below 1/4". The power supply pins must be well bypassed to reduce the risk of oscillation. A 1.0F tantalum capacitor in parallel with a 0.01F ceramic capacitor is adequate for each supply pin. For good AC performance, parasitic capacitances should be kept to a minimum, especially at the inverting input. This implies keeping the ground plane away from this pin. Carbon resistors are acceptable, while use of wire-wound resistors should not be used because of their parasitic inductance. Similarly, capacitors should be low inductance for best performance. 7 FN7122.2 March 26, 2007 EL1510 Capacitance at the Inverting Input Due to the topology of the current feedback amplifier, stray capacitance at the inverting input will affect the AC and transient performance of the EL1510 when operating in the non-inverting configuration. In the inverting gain mode, added capacitance at the inverting input has little effect since this point is at a virtual ground and stray capacitance is therefore not "seen" by the amplifier. Supply Voltage Range and Operation The EL1510 has been designed to operate with supply voltages from 2.5V to 12V. If a single supply is desired, values from +5V to +24V can be used as long as the input common mode range is not exceeded. When using a single supply, be sure to either 1) DC bias the inputs at an appropriate common mode voltage and AC couple the signal, or 2) ensure the driving signal is within the common mode range of the EL1510. Feedback Resistor Values The EL1510 has been designed and specified with RF=1.5k for AV=+5. This value of feedback resistor yields extremely flat frequency response with no peaking out to 40MHz. As is the case with all current feedback amplifiers, wider bandwidth, at the expense of slight peaking, can be obtained by reducing the value of the feedback resistor. Inversely, larger values of feedback resistor will cause rolloff to occur at a lower frequency. See the curves in the Typical Performance Curves section which show 3dB bandwidth and peaking vs frequency for various feedback resistors and various supply voltages. ADSL CPE Applications The EL1510 is designed as a line driver for ADSL CPE modems. It is capable of outputting 400mA of output current with a typical supply voltage headroom of 1.8V. It can achieve -85dBc of distortion at low 7.5mA of supply current per amplifier. The average line power requirement for the ADSL CPE application is 13dBm (20mW) into a 100 line. The average line voltage is 1.41VRMS. The ADSL DMT peak to average ratio (crest factor) of 5.3 implies peak voltage of 7.5V into the line. Using a differential drive configuration and transformer coupling with standard back termination, a transformer ratio of 1:1 is selected. The circuit configuration is as shown below. + - Bandwidth vs Temperature Whereas many amplifiers' supply current and consequently 3dB bandwidth drop-off at high temperature, the EL1510 was designed to have little supply current variations with temperature. An immediate benefit from this is that the 3dB bandwidth does not drop off drastically with temperature. 50 1.5k AFE 300 + - TX1 100 1:1 50 1.5k 8 FN7122.2 March 26, 2007 EL1510 Small Outline Package Family (SO) A D N (N/2)+1 h X 45 A E E1 PIN #1 I.D. MARK c SEE DETAIL "X" 1 B (N/2) L1 0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X SEATING PLANE L 4 4 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07 9 FN7122.2 March 26, 2007 EL1510 Dual Flat No-Lead Package Family (DFN) A D N N-1 0.075 C 2X E PIN #1 I.D. MDP0047 DUAL FLAT NO-LEAD PACKAGE FAMILY (JEDEC REG: MO-229) MILLIMETERS SYMBOL A A1 b c 1 2 0.075 C DFN8 0.85 0.02 0.30 0.20 4.00 3.00 4.00 2.20 0.80 0.50 0.10 DFN10 0.90 0.02 0.25 0.20 3.00 2.25 3.00 1.50 0.50 0.50 0 TOLERANCE 0.10 +0.03/-0.02 0.05 Reference Basic Reference Basic Reference Basic 0.10 Maximum Rev. 2 2/07 D D2 E B TOP VIEW 2X 4 L1 (D2) E2 e N-1 N L (N LEADS) L L1 NOTES: (E2) 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Exposed lead at side of package is a non-functional feature. PIN #1 I.D. 2 5 e b BOTTOM VIEW 1 0.10 M C A B 3 3. Bottom-side pin #1 I.D. may be a diepad chamfer, an extended tiebar tab, or a small square as shown. 4. Exposed leads may extend to the edge of the package or be pulled back. See dimension "L1". 5. Inward end of lead may be square or circular in shape with radius (b/2) as shown. 6. N is the total number of leads on the device. 0.10 C SEATING PLANE 0.08 C C SEE DETAIL "X" (N LEADS & EXPOSED PAD) 2 C A (c) A1 DETAIL X All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 FN7122.2 March 26, 2007 |
Price & Availability of EL1510
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |